Browsing by Author "Pak, Murat."

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    An enhanced multi-objective evolutionary algorithm (MOEA/D-DE) for the applications of analog sizing with both W/L and a novel operating point driven (OPD) based methods
    (Thesis (M.S.) - Bogazici University. Institute for Graduate Studies in Science and Engineering, 2011., 2011.) Pak, Murat.; Dündar, Günhan,
    In today’s electronics world, due to the growing requirements of mixed signal VLSI designs and the SoCs (system on chip), the design complexity is increasing drastically. Since the well-designed CAD tools can easily support the design of the digital circuits, analog CAD tools are still not enough for the needs of mixed signal VLSI designs and SoCs. One of the biggest reasons for this deficiency is the complex design procedure of an analog system. To design an analog circuit is much harder than designing a digital circuit. However, the world we live in is analog and there is no way to avoid analog circuitry. For all these reasons strong algorithms are trying to be implemented to automate analog circuit design. The sizing problem of analog circuits to obtain the best performance is an important subject of analog design automation. First of all, the reason why Evolutionary Algorithms are used for the analog sizing problem has been explained. Then, a Multiobjective Evolutionary Algorithm based on the Decomposition of the objective functions has been used as a background work. Lots of improvements have been realized to improve the quality of this method for more complex analog circuit sizing problems. Also, the optimization variables have been changed to DC operating points of the transistors instead of W/L values, in order to improve the search space. All the methods were implemented and the results are given in the work. It can be seen that the proposed W/L or the novel OPD (operating point driven) based methods are so powerful algorithms to optimize the analog sizing problem. During the thesis work, a folded cascode amplifier and a gain boosted amplifier have been optimized..
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    Multi-dimensional yield-aware optimization of the analog and heterogeneous circuits
    (Thesis (Ph.D.) - Bogazici University. Institute for Graduate Studies in Science and Engineering, 2020., 2020.) Pak, Murat.; Dündar, Günhan,
    Even though the design of digital circuits is well supported by several CAD tools, this is not the case for analog circuits and MEMS where the design is typically hand-crafted by expert designers. Several tools have been implemented for trade-off exploration in analog circuits; however, yield-optimization is a hot and vital topic considering that process variations have deteriorated along with the feature sizes scaling down; hence, physical variations originating from manufacturing process have a huge impact on yield. Therefore, efficient yield-aware optimization methodologies for analog ICs are needed. MEMS design, on the other hand, requires a lot of expert knowledge, which implies long design times and increased cost due to this physical heterogeneity. The approach followed by the industry, based on composing separately designed sensors and read-out circuitry, has several issues such as inappropriate partitioning of system specifications or potential violation of system level constraints during the coupling process of the these devices. Hence, design methodologies which can obtain globally optimal MEMS by performing co-optimization of the sensor and the circuit are needed. This study is mainly focused on developing and implementing novel and generic design methodologies for multi-objective yield-aware optimization of analog circuits and MEMS. A novel yield optimization technique has been proposed and compared with the existing approaches and has provided very promising results for yield-aware Pareto Front generation. Besides the work conducted for yield-aware optimization, co-optimization of MEMS and analog circuits has been performed for the first time by jointly optimizing a mechanical accelerometer sensor and an electronic read-out circuitry. The implemented yield-aware optimization techniques have been integrated into the co-optimization loop to enable yield-aware multi-objective optimization of MEMS.