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  1. Home
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Browsing by Author "Unutulmaz, Ahmet."

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    Analog layout synthesizer for a parasitic aware design loop
    (Thesis (M.S.)-Bogazici University. Institute for Graduate Studies in Science and Engineering, 2009., 2009.) Unutulmaz, Ahmet.; Dündar, Günhan,
    Analog design automation is being studied for a couple of decades and many researchers developed their own tools. However, there are no standards for these tools. The work done in this M.S. thesis aims to define standard interfaces for layout automation tools, making the integration of different tools possible. In addition to these interfaces, an interface for a layout database is defined. This interface is designed to hold any kind of layout structure and to cooperate with any kind of layout tool. Additionally, implementations for these interfaces are done. A floor-planner tool, a device generator, a fast database and a simple router are implemented in Java. The implemented tools are combined and a template based layout synthesizer is constructed. This layout synthesizer requires templates files coded in Java. Implementing the floor-planner, a new floor-plan representation and a new inequality solver are developed and used. Moreover, a novel synthesis loop is defined. In this synthesis strategy, contrary to the old synthesis approaches, the effects of the parasitic are considered in the synthesis loop. The layout synthesizer implemented in this thesis is preferable in this novel synthesis loop, due to the very short running time.
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    Enhanced layout-aware circuit / ststem synthesis
    (Thesis (Ph.D.) - Bogazici University. Institute for Graduate Studies in Science and Engineering, 2015., 2015.) Unutulmaz, Ahmet.; Dündar, Günhan,
    This thesis presents the layout description script (LDS) which is suitable to be used within a template synthesizing layout aware circuit synthesis loop. LDS is a hybrid programming language supporting both sequential and constraint programming capabilities. Through constraint programming, representations used in the layout optimizers may be converted to LDS which enables the integration of LDS with layout optimizers. The language allows to code not only static devices but also parametrized device generators. LDS is compared with available layout representations and code samples are given to highlight the superiority of LDS over sequential programming. An integrated development environment to code LDS, capable of keyword highlighting and syntax checking, is built and some screen shots are shared. A tool is coded to extract an LDS template from an expert drawn layout and sample templates and their instances are shown. A sequential convex programming based methodology is developed and used to minimize the layout area, which is shown to be a convex function of the layout width and height under realistic assumption. Thus, the area of an LDS template may be e ciently minimized which increases the exibility of an LDS template.

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