Ph.D. Theses
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Browsing Ph.D. Theses by Subject "Analog electronic systems."
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Item Enhanced layout-aware circuit / ststem synthesis(Thesis (Ph.D.) - Bogazici University. Institute for Graduate Studies in Science and Engineering, 2015., 2015.) Unutulmaz, Ahmet.; Dündar, Günhan,This thesis presents the layout description script (LDS) which is suitable to be used within a template synthesizing layout aware circuit synthesis loop. LDS is a hybrid programming language supporting both sequential and constraint programming capabilities. Through constraint programming, representations used in the layout optimizers may be converted to LDS which enables the integration of LDS with layout optimizers. The language allows to code not only static devices but also parametrized device generators. LDS is compared with available layout representations and code samples are given to highlight the superiority of LDS over sequential programming. An integrated development environment to code LDS, capable of keyword highlighting and syntax checking, is built and some screen shots are shared. A tool is coded to extract an LDS template from an expert drawn layout and sample templates and their instances are shown. A sequential convex programming based methodology is developed and used to minimize the layout area, which is shown to be a convex function of the layout width and height under realistic assumption. Thus, the area of an LDS template may be e ciently minimized which increases the exibility of an LDS template.Item Multi-dimensional yield-aware optimization of the analog and heterogeneous circuits(Thesis (Ph.D.) - Bogazici University. Institute for Graduate Studies in Science and Engineering, 2020., 2020.) Pak, Murat.; Dündar, Günhan,Even though the design of digital circuits is well supported by several CAD tools, this is not the case for analog circuits and MEMS where the design is typically hand-crafted by expert designers. Several tools have been implemented for trade-off exploration in analog circuits; however, yield-optimization is a hot and vital topic considering that process variations have deteriorated along with the feature sizes scaling down; hence, physical variations originating from manufacturing process have a huge impact on yield. Therefore, efficient yield-aware optimization methodologies for analog ICs are needed. MEMS design, on the other hand, requires a lot of expert knowledge, which implies long design times and increased cost due to this physical heterogeneity. The approach followed by the industry, based on composing separately designed sensors and read-out circuitry, has several issues such as inappropriate partitioning of system specifications or potential violation of system level constraints during the coupling process of the these devices. Hence, design methodologies which can obtain globally optimal MEMS by performing co-optimization of the sensor and the circuit are needed. This study is mainly focused on developing and implementing novel and generic design methodologies for multi-objective yield-aware optimization of analog circuits and MEMS. A novel yield optimization technique has been proposed and compared with the existing approaches and has provided very promising results for yield-aware Pareto Front generation. Besides the work conducted for yield-aware optimization, co-optimization of MEMS and analog circuits has been performed for the first time by jointly optimizing a mechanical accelerometer sensor and an electronic read-out circuitry. The implemented yield-aware optimization techniques have been integrated into the co-optimization loop to enable yield-aware multi-objective optimization of MEMS.