Ph.D. Theses
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Browsing Ph.D. Theses by Subject "Analog-to-digital converters."
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Item A generalized pareto front approach for performance estimation in analog design automation systems(Thesis (Ph.D.)-Bogazici University. Institute for Graduate Studies in Science and Engineering, 2010., 2010.) Deniz, Engin.; Dündar, Günhan,The design of analog circuits requires a deep insight into both physical and technological parameter interactions. In addition, every application of analog circuits has speci c constraints and requirements with large number of design equations, and also there is no unique solution of the design. At the same time, analog circuits are the key components of mixed-signal systems. Nowadays, not only design issues but also tradeo analysis of competing performances is considered to be a signi cant issue in circuit modeling such that analog design automation tools, which increase e ciency and productivity, have become an attractive solution for integrated circuits (IC) providers. Furthermore, performance estimation tool becomes a requirement in order to speed up the automation system by eliminating the unfeasible circuits and the circuits which cannot meet the speci cations. In this thesis, a general methodology for the performance estimation of mixedsignal systems is proposed while exploiting the Pareto Front concept. Performance estimation requires a well-determined performance design space (PDS) exploration for a given technology. Since the complexity of mixed-signal systems grows progressively, the exploration of a huge design space is required for the performance estimation of system blocks with a dramatically increased exploration time. Therefore, a Matlabbased library is presented for a fast and accurate PDS exploration. Then, Pareto Front approach is applied to the system blocks. In addition, not only are optimum solution sets extracted but also an approximate design of the blocks is obtained in this thesis. Finally, Pareto Front composition is discussed by supporting the dominance rule with algebraic representations.Item Asynchronous sigma-delta analog to digital converters(Thesis (Ph.D.)-Bogazici University. Institute for Graduate Studies in Science and Engineering, 2015., 2015.) Kayaaltı, Balkır.; Cerid, Ömer.Analog to digital conversion is the process of translating analog real world signals to their corresponding binary encoded form which digital devices need. Among the examples for analog signal sources storage devices like harddisks and sensor devices can be given. Analog to digital converters are key components that make this translation. A specific topology can be selected according to its achievable number of bits, speed, power and according to its area of usage. Sigma-delta analog to digital conversion is a popular type which can be used in applications where high resolution with moderate bandwidth is desired. High resolutions are achieved by the inherent noise suppression by the loop filter. Oversampling, which corresponds to the sampling of the input signal with a higher rate than that of the regular Nyquist rate is their other advantage. This process pushes the quantization noise away from the baseband, and thereby higher signal to noise ratios are achieved. There are mainly two sub-types of sigma delta converters. The first, is the discrete time version which uses discrete time signals and components. The second is the continuous time version which uses entire continuous time signals and components except the quantizer and the digital to analog converter (DAC) in the feedback. These two types are both clocked with an external clock signal, so the output is synchronous i.e. synchronized with a clock. Designing a new type of the circuit which does not use an external clock; but instead using the self oscillation created in the loop can be a an alternative third type. This type of the converter will not use sampling inside the loop, so clock jitter due to the sampling can be eliminated , where usually a high frequency signal is sampled. If the sampling is done with a lower frequency, effect of the clock jitter can be reduced. This thesis is about the theory of such converters and their design procedure with a real circuit implementation.Item High level modeling of sigma-delta analog to digital converters(Thesis (Ph.D.)-Bogazici University. Institute for Graduate Studies in Science and Engineering, 2008., 2008.) Talay, Selçuk.; Dündar, Günhan,This thesis discuss high-level modeling of Sigma-Delta ADC’s, development of a design automation tool which operates at system level, and other related software which are required for accurate operation of this tool. There are some models available in the literature which are suitable for a design automation system. These models are taken as a starting point in the modeling effort in this thesis. Also, a Sigma-Delta ADC design automation tool was developed which involves novelties such as performance estimator and architecture selection. With the contribution of the performance estimator module, the tool provides an extensive design environment to the users for the design of Sigma- Delta analog-to-digital converters. The developed models and their effects are clearly presented with examples. Design examples for 0.5μm and 0.35μm AMS technologies are provided for proving the accuracy and flexibility of the design automation tool. In addition, a Sigma-Delta ADC IC was designed and fabricated.Item Low power sigma delta analog to digital converter design methods(Thesis (Ph.D.) - Bogazici University. Institute for Graduate Studies in Science and Engineering, 2016., 2016.) Akçakaya, Feyyaz Melih.; Dündar, Günhan,Sigma delta analog to digital conversion is an effective way of converting analog signals to digital signals when high signal to noise ratio and low power consumption is needed. Instead of comparing the input signal with references, the sum of differences of the signal between each comparison is compared differentially or with references. This operation could be achieved with integrators and a transfer function in s or z-domain. When this comparison is performed more frequently than the Nyquist rate of the signal which is called oversampling, less quantization error is obtained. Thus, high signal to noise ratio and less harmonics in the system is obtained. Due to increase in mobile systems, power consumption became an important issue. Hence, engineers are more focused of efficiency of the systems. In this thesis, methods about designing low power sigma delta analog to digital converters with high performance are studied. Initially, 2nd order conventional and feed-forward discrete time sigma delta analog to digital converters with single-bit and multi-bit quantizers are studied. Next, 3rd order discrete time and 2-1 multi-stage sigma delta analog to digital converters are investigated. Afterwards, continuous time sigma delta conversion with different type of integrators is studied. Furthermore, a hybrid structure containing both discrete and continuous time integrators is investigated. In the meantime, the layout of the designs are prepared. Performance results of all the designs are obtained with post-layout simulations as well as the test results of the produced integrated circuits. Post-layout simulations show that the performance of the designs are close to the results of the designs with best results in the literature.