An automatic architecture generator for sigma-delta modulators considering component non-idealities

Abstract

In this thesis, a tool generated in MATLAB environment for automatic modeling and architecture synthesis of sigma-delta modulators is introduced. The tool is capable of generating the parametric signal and noise transfer functions of a sigma-delta modulator of any order automatically. After generating the transfer functions, it optimizes both the signal and noise transfer functions of the system simultaneously in such a way to realize a desired frequency response. Most important of all, this tool is capable of taking component non-idealities into account and optimizing the coefficients so as to compensate the effects of non-idealities on the system. The component non-idealities taken into consideration consist of the integrator non-idealities such as the switched capacitor mismatches, integrator leakage due to finite DC gain of the op-amp, etc. since they can directly be mapped to the transfer functions of the system. The tool uses some criteria in generating the architectures such as minimization of the number of signal paths of the architecture in order to obtain minimum possible complexity, avoiding of single closed loops without a delay and forcing all the coefficients to be real numbers. Also, another important aspect of the tool is that it spans the whole solution space according to these criteria and returns a set of several parametric solutions.