Assertion based verification for analog and mixed-signal designs using simulations

Abstract

This thesis studies assertion based veri cation methodology for analog and mixedsignal (AMS) designs and improves analog expressiveness of assertions. Assertion based veri cation methodology is originally derived for digital domain, hence AMS assertion languages are inadequate to express all aspects of AMS designs. Therefore, we rst introduce the halo concept for analog signals to formally express them with their tolerance and variation values in assertions. Haloes of analog signals de ne an e ective region around these signals which help analog comparison. Second, we integrate measurements and circuit analyses into AMS assertions. These analyses are widely used veri cation techniques in conventional AMS veri cation. Their integration into assertions provide a complete and uni ed AMS veri cation methodology. Finally, we develop AMS-Verify, a exible framework to verify AMS properties on simulations. AMS-Verify is able to express analog tolerances, measurements and circuit analyses. We validate our solutions in three case studies using AMS-Verify framework.