Design of low power continuous time analog to digital converters

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dc.contributorGraduate Program in Electrical and Electronic Engineering.
dc.contributor.advisorDündar, Günhan,
dc.contributor.authorParasnejad, Sina.
dc.date.accessioned2023-03-16T10:18:27Z
dc.date.available2023-03-16T10:18:27Z
dc.date.issued2014.
dc.description.abstractA second order CT modulator for audio frequency sensory systems in 180nm TSMC CMOS process is presented. The design incorporates a C-gm based current mode structure with 2nd order noise shaping, a 25 kHz bandwidth, a sampling frequency of 12.8 MHz marking an OSR of 256 and a total power consumption of 5.9 W. Consequently the proposed loop achieves a FOM of 2.8fJ/conv. The overall power consumption is distributed evenly among segments of the loop to attain adequate number of bits without the need to sacri ce power. Two representations of overall design, a robust Voltage input circuit and a high precision current input modulator, are introduced.
dc.format.extent30 cm.
dc.format.pagesxiv, 61 leaves ;
dc.identifier.otherEE 2014 P37
dc.identifier.urihttps://digitalarchive.library.bogazici.edu.tr/handle/123456789/12859
dc.publisherThesis (M.S.) - Bogazici University. Institute for Graduate Studies in Science and Engineering, 2014.
dc.subject.lcshSignal processing.
dc.subject.lcshAnalog-to-digital converters.
dc.titleDesign of low power continuous time analog to digital converters

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