Architectures and implementations for speech enhancement

dc.contributorGraduate Program in Electrical and Electronic Engineering.
dc.contributor.advisorDündar, Günhan,
dc.contributor.advisorArslan, Levent M.
dc.contributor.authorCoşgül, Gökhan.
dc.date.accessioned2023-03-16T10:22:23Z
dc.date.available2023-03-16T10:22:23Z
dc.date.issued2000.
dc.description.abstractComplexity of a high performance speech enhancement algorithm has been reduced while retaining its quality. This modification leads to faster implementation as well as lower cost.The reduced complexity speech enhancement algorithm has taken as a typical digital signal processing application. Thus, architectures and implementation techniques for blocks involved in this algorithm have been studied. In addition, thanks to the design methodology employed, these implementations can easily be ported into other algorithms involving the same blocks.
dc.format.extent30 cm. +
dc.format.pagesxi, 55 leaves ;
dc.identifier.otherEE 2000 C67
dc.identifier.urihttps://digitalarchive.library.bogazici.edu.tr/handle/123456789/13071
dc.publisherThesis (M.S.) - Bogazici University. Institute for Graduate Studies in Science and Engineering, 2000.
dc.relationIncludes appendices.
dc.relationIncludes appendices.
dc.subject.lcshSignal processing -- Digital techniques.
dc.subject.lcshFourier transformations.
dc.titleArchitectures and implementations for speech enhancement

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