Elektrik- Elektronik Mühendisliği
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Browsing Elektrik- Elektronik Mühendisliği by Author "Afacan, Engin."
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Item Aging in CMOS circuits and circuit design robust to aging phenomena(Thesis (M.S.) - Bogazici University. Institute for Graduate Studies in Science and Engineering, 2011., 2011.) Afacan, Engin.; Başkaya, Faik.The subject of aging in CMOS circuits has been examined and some reliability simulations have been run for analog CMOS circuits in order to observe the e ects of this phenomenon on the reliability of CMOS circuits in this work. Electronic circuits also have a useful lifetime as everything in the nature. This time can be de ned as a regular period where the circuit is able to work properly and do its function accurately. Despite the fact that rapid advances in semiconductor technology brings many advantages, there are also some drawbacks. One of these negative consequences is reduction of reliability of circuits. Aging isn't a new trend for the CMOS circuits but, after the iteration of Moore's law which pushed the transistor channel length to under 180 nm, the subject of aging has been elevated from an academic exercise to a growing, and perhaps a detrimental concern which the foundries have focused on. In order to understand the physical mechanisms and create solutions to this phenomenon, reasons should be manifested clearly by both researchers and foundries. There are a number of physical failure mechanisms a ecting the reliability of a CMOS ASIC. Hot Carrier Injection (HCI), Negative Bias Temperature Instability (NBTI), Time Dependent Dielectric Breakdown (TDDB) and Electromigration are the most common failure mechanisms. The physical causes are investigated and a number of aging models of these mechanisms were discussed in the initial chapters. In addition to this theoretical study, three diverse CMOS Cross-Coupled Di erential LC Oscillators (NMOS, PMOS, and CMOS) were designed to observe the aging e ects on phase noise of each structure, reliability simulations were run for each structure, and the study is completed by evaluating all of these results.Item Analog circuit design automation against process variations and aging phenomena(Thesis (Ph.D.) - Bogazici University. Institute for Graduate Studies in Science and Engineering, 2016., 2016.) Afacan, Engin.; Başkaya, Faik.Reliability of CMOS circuits has become a major concern due to substantially worsening process variations and aging phenomena in deep sub-micron devices. As a result, conventional analog circuit sizing tools have become incapable of promising a certain yield whether it is immediately after production or after a certain period of time. Thereby, analog circuit sizing tools have been replaced by better ones, where reliability is included in the conventional optimization problem. Variation-aware analog circuit synthesis has been studied for many years, and numerous methodologies have been proposed in the literature. On the other hand, as far as we know, there has not been any tool that takes lifetime into account during the optimization. Besides, there are a number of di erent issues with lifetime-aware circuit optimization, where aging analysis is still quite problematic due to modeling and simulation de ciencies. Furthermore, both tools su er from the challenging trade-o between e ciency and accuracy. Recon gurable analog circuit design is another way of designing analog circuits against aging. However, design of a such complicated system is highly time consuming process to be performed by hand. Even though recon gurable circuit design has been studied in the literature, there has been no attempt to automatize the design process to reduce the design time. With regard to aforementioned these problems, this study addresses all of these problems under a general title of reliability-aware analog circuit design automation, severally discusses them in detail, and proposes novel solutions to deal with not only existing but also not addressed problems.