Elektrik- Elektronik Mühendisliği

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0-30V / 5A digital power supply with computer control
(Thesis (M.S.)-Bogazici University. Institute for Graduate Studies in Science and Engineering, 2010., 2010.) Sünetci, Önder.; Kahya, Yasemin.; Cerid, Ömer.
Most of the electronic circuits require a DC power supply to operate. There are many designs and topologies covering different properties and specifications for DC power supplies. The voltage and current range and accuracy, power capacity and quality, failure protections, isolations, robustness and reliability, power efficiency, size and ease of usage are some of the most important characteristics of power supplies. A DC power supply with the parameters given in the following sections is designed and realized for the fulfillment of the Master of Science thesis. The criteria for making decisions on the design parameters were range, isolations and ease of use. The range is proposed to be 30VDC and 5A output. The isolation is realized both between the mains and the device and between the device and PC that, when connected, controls it. For the ease of use, a 4x4 keypad to enter data and a 2x20 character LCD to monitor data are used.
10-BIT 60 MS/s two-step flash ADC design
(Thesis (M.S.) - Bogazici University. Institute for Graduate Studies in Science and Engineering, 2013., 2013.) Esen, Vahap Barış.; Dündar, Günhan,
Two step flash ADCs have widespread use in electronic circuits, since they can achieve decent resolutions in high speed applications. Their two step structure requires coordination of many analog blocks that is ensured by control signals. Generating and delivering these control signals as clock signals are as important as the design of the analog blocks. In this thesis analog design of a two-step flash ADC which is used as a test circuit for an automation tool that can synthesize the necessary clock signals is presented. The design procedures of the blocks in 10-bit 60 MS/s two step flash ADC are examined. The overall design is realized by using UMC 180nm technology. Finally the simulation results obtained by using Mentor Graphics tools and MATLAB are presented. The performance of the ADC is evaluated using ENOB as a figure of merit. Resolutions up to eight bits are attained in typical case simulations. Comparison with the literature is also made by using energy per conversion values.
140 Mb/s deqpsk modem if stage
(Thesis (M.S.) - Bogazici University. Institute for Graduate Studies in Science and Engineering, 1985., 1985.) Suyabatmaz, M. Akif.; Cerid, Ömer.
Recently, as the digital technology progresses, the exploding capacity of digital information nececities fast digital communication systems. Since the congestion prevailing in many regions of radio frenuency spectrum has created the need for improved spectrum utilization techniques, the demand for multilevel (Mrary) digital modulation techniques has also increased. In this thesis, a differentially encoded and differentially decoded quadrature phase shift keyed modem, employing coherent demodulator, was briefly analy.zed. System building blocks were investigated and the one, proper to high data rate application, was chosen for system realization. A working circuit, was build as an intermediate frequency (IF) stage, operating at 140 Mbit per second, and realized.
2D to 3D video conversion
(Thesis (M.S.) - Bogazici University. Institute for Graduate Studies in Science and Engineering, 2016., 2016.) Çoban Aydın, Aysun.; Acar, Burak.
Stereoscopic 3D visualisation is increasingly embedded into social life through the use of commercially available 3D-TV sets. In this work, a hybrid approach for 2D to 3D conversion is presented to produce stereoscopic 3D video automatically from 2D mono video frames. Each frame is synthesized to stereo pairs. Disparity/depth information required for 3D view is extracted from mono frame sequences based on motion and geometrical cues. Depth estimation of the scene is considered separately for background and foreground. Background geometry of the scene is determined by using geometrical cues such as vanishing point and straight lines in the image. According to this geometry, relevant information on the background depth eld of a single image is estimated to generate a canonic disparity map of the background. For foreground depth estimation, on the other hand, two approaches are presented. First approach is based on detection of moving foreground objects. A depth value is assigned to each object based on its corresponding location in the background depth map. In the second approach, background registration is applied for consecutive frames that are captured by a moving camera. By this method, disparity in foreground regions is distinguished from background disparity that leads to a distinctive 3D e ect on foreground regions. Consequently, depth/disparity information of foreground regions is combined with background canonic disparity map. According to these nal disparity maps, pixels of the original frames are shifted to generate virtual frames to enable 3D views. This work is accompanied by a subjective evaluation on the basis of user test which compare our 3D results with commercially available 3D-TV sets.
3.125Gbps FIR equalizer implementation in 65nm CMOS technology
(Thesis (M.S.)-Bogazici University. Institute for Graduate Studies in Science and Engineering, 2008., 2008.) Kurnaz, Hande Akın.; Dündar, Günhan,
This thesis describes channel degradation in a basic telecommunication system with its sources (crostalk and metalic channel los) and results (inter-symbol interference). Compensation of this channel degradation via methodology caled equalization is focused on. Adaptive equalization techniques such as zero forcing, least mean squares (LMS), recursive least squares (RLS) and constant modulus algorithm (CMA) are theoreticaly explained and LMS and RLS are supported with regarding MATLAB Simulink simulations using 30inch PCB trace model as the channel model. Comparison of adaptation algorithms, equalization cost functions and tap spacing of tapped delay line in using 30inch PCB trace model as the channel model. Comparison of adaptation algorithms, equalization cost functions and tap spacing of tapped delay line in FIR equalizer in Simulink are also held for this thesis. Coeficients obtained from Simulink environment are used to verify performance of FIR equalizer designed in STMicroelectronics CMOS065 (65nm) technology for 3.125Gbps data rate. Building blocks of FIR equalizer are analyzed in detail and design limitations are summarized. Simulations showed that closed eye at the receiver after 30inch PCB channel, can be cleaned up to data eye with 28ps jiter by means of 4-tap FIR equalizer with T/8 tap spacing operating at 1.2V power supply, 3.125Gbps data rate and at the expense of only 13mA of current consumption.
3D-engineered muscle tissue as a wireless sensor
(Thesis (M.S.) - Bogazici University. Institute for Graduate Studies in Science and Engineering, 2023., 2023) Karabulut, Çağla.; Dumanlı Oktar, Sema.
Implantable and wearable biomedical devices are advancing with new sensor technologies, holding great potential for early disease detection through continuous, real-time monitoring of physiological parameters. However, the majority of existing biomedical devices have limited lifetimes due to their power requirements and often focus on monitoring physical parameters rather than specific molecules relevant to specific diseases. The work detailed in this thesis proposes a wireless sensing and communication platform that can achieve in-vivo, real-time sensing at a molecular level by utilizing engineered mammalian cells. The proposed platform consists of a cell-based bio- hybrid implant device and a dual-port, wide-band on-body antenna. The molecular sensing is achieved by the bio-hybrid implant that is composed of three main components: a flexible scaffold, an in-body passive implant antenna, and 3D-engineered muscle tissue. The genetic circuitry of the cells that make up the 3D-engineered muscle tissue can be manipulated. This manipulation makes the tissue responsive to specific target molecules and the presence of these molecules triggers a contraction in the tissue. The tissue contraction and relaxation are used to reconfigure the resonance frequency of the implant antenna that is located on the flexible scaffold. To monitor the changes in resonance reconfiguration, the on- body reader antenna is positioned outside of the human body. The implant antenna’s resonance variations are observed in response to the presence of the molecule of interest. In this thesis, the bio-hybrid implant and the on-body reader antenna were designed and fabricated. The sensing system is mechanically and electromagnetically simulated. Based on the simulations, electromagnetic measurements were taken inside tissue-mimicking phantoms to track implant antenna reconfiguration.
A 10 bit interface circuit for an array of capacitive transducers
(Thesis (M.S.) - Bogazici University. Institute for Graduate Studies in Science and Engineering, 2016., 2016.) Vosoughi, Mohammad Ali.; Dündar, Günhan,
Terahertz Cameras are going to be widely used in many places, speci cally for medical purpose and there are many advantages over the use of terahertz signals for imaging. Among di erent methods of terahertz imaging, the transformation of the THz signals into the form of absorbed heat and mechanical displacements can be used for medical purposes. The use of mechanical de ections for cameras requires a method for measuring the displacement. From di erent modalities for displacement sensing, capacitor based displacements are widely used in literature. For many reasons, including cost and feasibility with current technologies and compatibility with MEMS fabrications process, capacitive displacement transducers are the best choice for photo-mechanical cameras. Simulations show that the interface circuit should satisfy a su ciently good safe margin for operation of circuit in di erent sensing capacitor dimensions. A rail-to-rail voltage at the output of the sensor interface circuit might limit tolerance of the fabrication process. Therefore, conventional method with limited output voltage swing is employed to provide su ciently exible solution. A 10 bit data converter transduces the capacitance value to a digital modulated signal.
A bottom-up approach to peer-to-peer live multicast
(Thesis (M.S.) - Bogazici University. Institute for Graduate Studies in Science and Engineering, 2011., 2011.) Öztaş, Başak.; Sankur, Bülent.
The implementation difficulty of IP multicast in terms of both structural and economical reasons, headed the multicast functionality towards higher layers. Peerto- peer multicasting have aroused as a potential solution for these services and it has established a presence in the market rapidly. However, it came with several challenging design and deployment issues, and unresolved problems. One of the key concerns of P2P protocol designing is the overlay construction phase. However, neither tree based systems nor mesh based systems are robust enough to provide a resilient and efficient service. In this study, we propose a new overlay topology for P2P multicasting to eliminate the problems caused by the best effort nature of the Internet infrastructure and unpredictable behavior of peers. In this approach, we are handling the tree based architecture of P2P live video streaming with a bottom-up perspective. By allowing reverse transmission of video packets, i.e., packet transmission from descendants through ascendants, the disruptions caused by the packet losses and peer churn are effectively reduced. By implementing the proposed method, we consistently achieved better video quality than a well known tree based P2P protocol (SPPM), notably in the cases of high packet loss ratio and peer churn.
A combined wavelet and auyoregressive based statistical intrusion detection system "the wavelet-AR IDS"
(Thesis (M.S.)-Bogazici University. Institute for Graduate Studies in Science and Engineering, 2007., 2007.) Güven, Umut.; Anarım Emin.
Networks are complex interacting systems and are comprised of several individual entities such as routers and switches. Network performance information is not directly available, and the information obtained must be synthesized to obtain an understanding of the ensemble behavior. Threat from un-authorized users and remote attackers is increasing rapidly. There is a need for robust and reliable Intrusion Detection Systems. Common criterions for reliable IDS are low false positive rate and false negative rate, and high true positive rate and true negative rate. If IDS satisfies these criterions then it can be used to provide network security. In this thesis, a new IDS scheme is proposed. Wavelet-AR IDS is designed to satisfy the criterions above. In the design phase the objective was to reduce to Autoregressive based IDS’s false positive rate. The other objective was to design a new A operator matrix in order to increase the detection rate of Intrusion Detection System. The innovation in this thesis is to combine Wavelet and Autoregressive models in order to design a robust and reliable Intrusion Detection System. It is shown that Wavelet-AR IDS has acceptable false alarm rate and false negative rate, and Wavelet-AR IDS has high true positive rate and true negative rate. Consequently, we can say that Wavelet-AR IDS is a good Statistical Intrusion Detection System.
A comparison of fuzzy methods for modeling
(Thesis (M.S.)-Bogazici University. Institute for Graduate Studies in Science and Engineering, 2008., 2008.) Aras, Ayşe Çisel.; Kaynak, Okyay,
Type-1 Fuzzy Logic Controllers (FLCs) have been used in control applications for more than thirty years. However, traditional type-1 FLCs are de cient in dynamical unstructured environments and in many real-time applications that include large amount of uncertainties. Further to this, fuzzy logic systems work cooperatively with many optimization techniques. Conventionally, the antecedent and consequent part of the rules are tuned to obtain minimum error response. However, this situation is not desirable where the expert knowledge about the system is signi cant. Thus, scientists have started to seek new approaches or develop existing methods. In literature, there are a number of noteworthy publications on type-1 fuzzy logic with parameterized t-norms. During the optimization process in this fuzzy model, the parameters of the operators and consequent part of the rules are tuned; therefore, the expert knowledge about the system is not lost or distorted. In line with this trend, the most important contribution of this thesis is that parameterized conjunctions are expanded and Constrained Fuzzy Sets (CFSs) with parameterized conjunctions are proposed. By using constrained fuzzy sets with parameterized conjunctions, both the uncertainty and the expert knowledge are taken into account. Thus, the expert knowledge about the system is not lost or distorted and the fuzzy model has more design parameters. This study has the goal of comparing the performance of four di erent approaches to fuzzy modeling, using parameterized conjunctions, a novel concept named Constrained Fuzzy Sets (CFSs), CFSs with parameterized conjunctions, and unnormalized interval type-2 Takagi Sugeno Kang (IT2 TSK). The theoretical and mathematical backgrounds of the four approaches are brie y described and their performances are compared in approximating a nonlinear function.
A comparison of identification techniques for fractional order systems
(Thesis (M.S.)-Bogazici University. Institute for Graduate Studies in Science and Engineering, 2009., 2009.) Şenyuva, Rıfat Volkan.; Denizhan, Yağmur.
This thesis compares the performances of various identification methods of deterministic and linear systems described by fractional order models. A detailed introduction to fractional calculus and fractional differential equations is presented. In this respect, the definitions of fractional calculus by Cauchy, Gr¨unwald-Letnikov, Riemann- Liouville and Caputo as well as their properties and integral transforms are covered. Both analytical and numerical solutions of fractional differential equations as well as the initial condition problem are given in this thesis. Nonparametric and parametric system identification techniques for integer order systems are reviewed. The investigated fractional order identification methods are parametric techniques based on minimizing the prediction error. The modeling is done in black-box approach where the structure of the fractional order differential equation is selected at the start of the identification procedure. The estimation of the parameter vector can be performed in time and frequency domain. Time domain identification is carried out by using linear regression form and Gr¨unwald-Letnikov’s definition while the investigated frequency domain methods are Levy’s method and Levy’s method with Vinagre’s weights. As benchmark systems, semi-integrating electrical circuits and Bagley-Torvik’s viscoelastic system are used. Identification results have revealed that in general the proposed fractional order models are more successful at predicting the system output than the proposed integer order models. The persistency of excitation from integer order system identification has to be redefined for fractional order system identification. Time domain methods can be applied directly while in frequency domain system’s frequency response must first be estimated by nonparametric methods. Original contribution of this thesis is the comparison of integer and fractional order models for the chosen benchmark systems.
A configurable interface for analog sensor outputs
(Thesis (M.S.) - Bogazici University. Institute for Graduate Studies in Science and Engineering, 2019., 2019.) Demirer, Baran.; Başkaya, Faik.
Reading out analog sensor outputs can be a challenging task at low frequencies because of the low frequency noise. To obtain a sensor signal clearly, special interface circuits are required. By using such circuits, analog signals are cleaned from oﬀset, drift and 1/f noise. Besides, if the interface circuitry is conﬁgurable, it can be possible to interface to inputs at diﬀerent frequency ranges. At the interface block, analog sensor output signal is moved to a frequency band where low frequency noise eﬀects are not dominant by using chopping modulation technique. The frequency-shifted signal is then ﬁltered using various ﬁlter types. To remove the low frequency noise before moving the signal back to the original band, three types of ﬁlters used in the interface are Active RC, Gm-C, and Switched Capacitor ﬁlters. The entire topology can be conﬁgured by a 5-bit digital to analog converter (DAC) called Biasing DAC (BDAC). This allows us to digitally change the biasing current of operational transconductance ampliﬁers (OTA). Therefore, OTA based ampliﬁers and ﬁlters can operate in diﬀerent frequency ranges. As conclusion, a conﬁgurable analog sensor interface has been designed. The de sign and layouts have been realized in Cadence Virtuoso using UMC 130nm techology.
A decision tree based intrusion detection system with bootstrap aggregating, discretization, and feature selection
(Thesis (M.S.) - Bogazici University. Institute for Graduate Studies in Science and Engineering, 2014., 2014.) Özdemir, Seray.; Anarım, Emin.
In this thesis, many machine learning techniques which are used for network intrusion detection are analyzed in detail. An intrusion detection system based on a combination of bootstrap aggregating, discretization, feature selection and classi cation methods is proposed for achieving a successful denial of service attack detection rate. Detecting denial of service attacks is the main purpose of this study, but detecting other kinds of network attacks and normal network tra c correctly is also our concern. We use various lters on training dataset before we form the model. Firstly, the bootstrap aggregating method is applied for creating di erent training datasets from the original dataset and combining the results that come from each of them. Secondly, entropy based discretization, equal-width binning, equal-frequency binning, and proportional k-interval discretization methods are used for discretizing the numeric attribute values. Finally, correlation based feature selection, consistency based feature selection, information gain based feature selection, and symmetrical uncertainty based feature selection methods are applied for decreasing the complexity. After the ltering steps, J48 decision tree classi er is used for learning. Then, the model is tested with a distinct dataset. KDD'99 training and testing datasets are used for experiments. Our combined method has increased the success of single classi er for all performance measures. Especially, adding bootstrap aggregating to ltered and attribute selected classi er provided a remarkable improvement.
A delayed feedback based practical chaos control method: Tail aperture feedback
(Thesis (M.A.) - Bogazici University. Institute for Graduate Studies in the Social Sciences, 2018., 2018.) Terbaş, Dilge.; Denizhan, Yağmur.
Control of chaotic systems has been one of the central issues in the ﬁeld of chaotic dynamics since early 1990s. A particularly simple and practical method is the Delayed Feedback Control (DFC) introduced by Kestutis Pyragas, to stabilize chaotic systems at an Unstable Periodic Orbit (UPO). The basic idea of the DFC method is to apply an additive control input that is proportional to the diﬀerence between the current state and the state of the system delayed by the period of the target UPO. Since the DFC method only requires the knowledge of the period of the UPO, it has attracted great interest and has been applied to many systems. To render the method even more feasible and applicable various modiﬁcations and extensions of the original DFC have been presented in the literature. In this thesis, a practical variant of the DFC, namely the Tail Aperture Feedback (TAF) method has been proposed that combines the basic approach of the DFC with some ideas borrowed from the OGY type chaos control. A practical procedure has been introduced for selecting the relevant parameters and applying the TAF method. More over, an original sparsiﬁcation method has been presented which reduces the stored data. The performances of basic DFC method and the TAF method have been com pared and the improvement provided by the sparsiﬁcation method has been demon strated on basis of simulation results.
A dynamically clock-controlled binary stream cipher with memory and dynamic multiplexing "the mono stream cipher"
(Thesis (M.S.)-Bogazici University. Institute for Graduate Studies in Science and Engineering, 2006., 2006.) Uzun, Orçun.; Anarım, Emin.
Streams ciphers are appropriate for high speed encrypted communications because this type of ciphers provide high output speed and ease of implementation in hardware. Generally, stream ciphers makes use of Linear Feedback Shift Registers (LFSRs) due to its simplicity and its ease of realization both in software and hardware. However, this efficient component is not sufficient when we consider security. The designer should use many nonlinear functions and mechanisms to make the system more resistant against cryptanalysis. A stream cipher should have high period, high linear complexity, good statistical properties and be resistant against most recent successful attacks such as algebraic attacks, correlation attacks, time memory tradeoff attacks, and divide and conquer attacks. In this thesis, a new stream cipher design is proposed. MONO is designed to be resistant against algebraic and correlation attacks. In the design phase, the objective was to design a stream cipher with good randomness, high period and linear complexity and resistance against many attacks. The other objective was to design a realizable stream cipher. Also the innovation in this thesis is the proposal of a dynamically clock controlled filter generator with the use of memory and dynamic multiplexing. The initialization step of MONO is based on solving a mathematical problem which is known to be difficult, to deduce the secret key. It is showed that MONO stream cipher satisfies high period and linear complexity. Also, system has good statistical properties. We have made several statistical tests to see whether MONO cipher satisfies basic requirements for random number generation. MONO passed all of the tests. MONO is secure against many important attacks such as correlation attacks, algebraic attacks, divide and conquer attacks, and time memory trade off attacks. The hardware implementation of MONO has also been investigated and we had observed appropriate results. Consequently, we can say that MONO is appropriate for both hardware and software applications.
A general design methodology for embedded high speed A/D converters
(Thesis (M.S.) - Bogazici University. Institute for Graduate Studies in Science and Engineering, 2001., 2001.) Talay, Selçuk.; Dündar, Günhan,
There are various types of analog-to-digital converters available in the literature. The fast and efficient data converter design automation systems gaining more and more interest. Although there are tools available for the synthesis of specific ADC architectures, there's need for development of the methods for the systematic selection of the topology. The first step in data converter design automation is the selection of the adequate architecture. This thesis proposes a methodology for the systematic selection of the topology. Different architectures have been modeled in this study. Using these models, the restrictions introduced have been calculated. These restrictions have been used for generating the specifications of the blocks of each topology. The optimization has been done for the specifications. Then, the library has been searched for an adequate block that satisfies the required specifications. If the methodology could not find a solution, the range of inputs have been swept. Then the area, the power and the speed performances have been calculated in order to find the optimum topology. The methodology for optimum topology selection has been realized. The results of the methodology were tested with the previous work. The results were similar as expected but models need further improvement for higher accuracy.
A generalized pareto front approach for performance estimation in analog design automation systems
(Thesis (Ph.D.)-Bogazici University. Institute for Graduate Studies in Science and Engineering, 2010., 2010.) Deniz, Engin.; Dündar, Günhan,
The design of analog circuits requires a deep insight into both physical and technological parameter interactions. In addition, every application of analog circuits has speci c constraints and requirements with large number of design equations, and also there is no unique solution of the design. At the same time, analog circuits are the key components of mixed-signal systems. Nowadays, not only design issues but also tradeo analysis of competing performances is considered to be a signi cant issue in circuit modeling such that analog design automation tools, which increase e ciency and productivity, have become an attractive solution for integrated circuits (IC) providers. Furthermore, performance estimation tool becomes a requirement in order to speed up the automation system by eliminating the unfeasible circuits and the circuits which cannot meet the speci cations. In this thesis, a general methodology for the performance estimation of mixedsignal systems is proposed while exploiting the Pareto Front concept. Performance estimation requires a well-determined performance design space (PDS) exploration for a given technology. Since the complexity of mixed-signal systems grows progressively, the exploration of a huge design space is required for the performance estimation of system blocks with a dramatically increased exploration time. Therefore, a Matlabbased library is presented for a fast and accurate PDS exploration. Then, Pareto Front approach is applied to the system blocks. In addition, not only are optimum solution sets extracted but also an approximate design of the blocks is obtained in this thesis. Finally, Pareto Front composition is discussed by supporting the dominance rule with algebraic representations.
A harmonic balance method and its implementation for the steady-state analysis of nonlinear networks
(Thesis (M.S.) - Bogazici University. Institute for Graduate Studies in Science and Engineering, 1981., 1981.) Kavaklıoğlu, Ömer.; Göknar, I. Cem.
A method for finding the petiodic solution of nonlinear networks which avoids the time domain solution of the dynamic equations has been investigated. In the method, the network under consideration is decomposed into one linear and several nonlinear subnetworks. Only frequency domain solution of the linear subnetwork is required. Various forms of the Mixed Nodal Tableau equations which are used in formulating the linear subnetwork in the frequency domain are explained through the introduction of a technique for obtaining voltage and current graphs of a network. A new expression for the gradient of the error function in the case that the period T of the oscillations is unknown has been developed and compared to the one derived by Nakhla and Vlach. The method has been, tested on several examples. It is shown. that considerable reduction in the size of the computational problem is achreved by taking advantage of the linearities present in the network.
A high voltage triboelectric energy harvesting system utilizing parallel-SSHI rectifier and DC-DC converters for SUB-5 hz motions
(Thesis (Ph.D.) - Bogazici University. Institute for Graduate Studies in Science and Engineering, 2020., 2020.) Kara, İsmail.; Mutlu, Şenol.; Doğan, Hakan.
In this thesis, the first integrated circuit (IC) implementation of parallel synchronized switching harvesting on inductor (parallel-SSHI) is presented for triboelectric energy harvester targeting 1 Hz to 5 Hz mechanical motions. It is accompanied by on-chip buck and switched-capacitor DC-DC converters, all capable of handling 70 V levels. Unlike piezoelectric harvesters, triboelectric nanogenerators (TENGs) can produce very high open-circuit voltages; thus, the proposed system utilizes this property within the technology limits to maximize the extracted power. An in-house manufactured TENG using steel and polytetra uoroethylene (PTFE) is modeled for sub-5 Hz motions. The energy is extracted and stored in an external capacitance until its voltage reaches 70 V, which is achieved in three press-and-release mechanical cycles. 70-to-2 V down conversion is carried on by a 70-to-10 V buck converter followed by a 10-to-2 V switched-capacitor DC-DC converter. A chip is manufactured in TSMC 0.18 m HV BCD process with an active area of 6.25 mm2. End-to-end peak e ciency is measured as 32.71% for 1 Hz motion with a 722 W total power delivery to the load for 4 ms.
A hybrid document segmentation method for Turkish newspapers
(Thesis (M.S.) - Bogazici University. Institute for Graduate Studies in Science and Engineering, 1998., 1998.) Aktaş, M. Feridun.; Sankur, Bülent.
Today most of the information is conveyed in the form of printed papers. The range of them varies from the newspapers to formal correspondence letters, from banking documents to envelopes etc. The evaluation of document processing systems made it possible to transfer this information from the printed materials to the electronic media. To transfer and archive this information some recognition, compression and conversion techniques are used. These techniques extract the document components and process them regarding the content type. Documents are mainly composed of text and image blocks, line and drawings. This thesis is focused on the extraction of document image components for further processing. This operation is known as document analysis. Several document analysis techniques are reviewed and one of them, Recursive X - Y Cut, is modified and applied to the Turkish newspapers. This method recursively analyze the horizontal and vertical projection profile of documents and locate the most appropriate cut (horizontal or vertical) over the documents. The process recursively continues until the smallest desired blocks are found or not any appropriate cut place exists on the document. At the result, blocks that mostly contain single type of document component, are extracted. The blocks, that contains several type of document components, are fed to another segmentation algorithm.oeu(n.amtbr_i

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