Elektrik- Elektronik Mühendisliği

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Browsing Elektrik- Elektronik Mühendisliği by Subject "Analog electronic systems."

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    Active filter design with unity gain current cells
    (Thesis (M.S.)-Bogazici University. Institute for Graduate Studies in Science and Engineering, 2004., 2004.) Erdoğan, Erdem Serkan.; Çiçekoğlu, Oğuzhan.
    In this thesis, the design of a current follower (CF) starting from the building stages as input, inversion and output, is presented together with the newly proposed circuit techniques to improve the performance of the CF in terms of the input impedance, bandwidth and the current transfer gain. The transistor level circuit designs are verified with SPICE simulations. Monte Carlo and Worst Case simulations are also given to estimate the behavior of the CF due to the integration process tolerances.New analog signal processing circuits employing CFs as active elements are also presented in this thesis. The proposed circuits can be grouped as inductance simulator circuits and multifunction filters that are all examined in terms of sensitivity analysis by calculating the passive component sensitivities and by using the inherent non-idealities of the CF. The simulations of the proposed circuits are performed with the designed CMOS implemented CF macro model and they are given as the applications of the circuits to verify the presented theory.
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    An analog template router based on layout description script (LDS)
    (Thesis (M.S.) - Bogazici University. Institute for Graduate Studies in Science and Engineering, 2014., 2014.) Sümengen, Cem.; Dündar, Günhan,
    Long design-test cycles in full-custom design process leads to high design costs in analog circuit design. The objective of design automation is to decrease the design cost and the time to market by reducing the time spent in the design process. Template-based tools have an advantage of requiring lower computational time by utilizing stored design knowledge. This property makes template based design techniques very appealing for some applications such as porting a design to di erent technologies or making minor changes on the design in the same technology. Unutulmaz et al. (2011) presented a declarative language to de ne layout templates for analog circuits, named Layout Description Script (LDS). In this study, a template router is proposed which outputs routing information for layout templates coded in LDS. The output of the router is exible routing information also coded in LDS. It is shown that the layout instances created from the output template with routing information can adapt itself to the changes in the dimensions of the circuit elements. Therefore, the template can be used by design automation tools in a closed optimization loop. The router proposed in this thesis di ers from the other routers by the nature of it's input and output. The input le holds the relative placement information of the circuit elements rather than providing xed coordinates in the layout. Likewise, the output le consists of relative positions of the interconnect and is self-adapting for the variations in dimensions of the circuit elements.
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    Design and development of current - mode hall sensor microarray with analog front - end and ADC integrated circuit
    (Thesis (M.A.) - Bogazici University. Institute for Graduate Studies in the Social Sciences, 2018., 2018.) Tunçtürk, Özcan.; Dündar, Günhan,
    A study of current-mode cross-shaped Hall effect sensors with detailed analyses of each building block of Hall effect sensor microsystems including analog front-end com ponents, and readout circuitry is presented. These include 4-phase current spinning, chopper amplifier, switched capcitor low-pass filter, and single-slope analog-to-digital converters. Significant e↵ort is devoted to eliminate the o↵set and 1/f noise of current mode Hall sensors. In addition, current-to-voltage conversion using chopper amplifiers is also investigated. The noise magnitude around 1 kHz is reduced from 65 nv to 8 nv using the chopping technique. The optimum W/L ratio of a cross-shaped Hall sensor is found to be 2.55 which provides a sensitivity of 239 nA/T by biasing at 10 µA. A switched capacitor 5th order elliptic low-pass filter is designed to remove the unwanted noise components that appear at odd harmonics of the chopping frequency. A 10-bit single-slope ADC is designed to digitally represent the magnetic field data. The designs presented are made using UMC 180 nm CMOS technology.
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    Enhanced layout-aware circuit / ststem synthesis
    (Thesis (Ph.D.) - Bogazici University. Institute for Graduate Studies in Science and Engineering, 2015., 2015.) Unutulmaz, Ahmet.; Dündar, Günhan,
    This thesis presents the layout description script (LDS) which is suitable to be used within a template synthesizing layout aware circuit synthesis loop. LDS is a hybrid programming language supporting both sequential and constraint programming capabilities. Through constraint programming, representations used in the layout optimizers may be converted to LDS which enables the integration of LDS with layout optimizers. The language allows to code not only static devices but also parametrized device generators. LDS is compared with available layout representations and code samples are given to highlight the superiority of LDS over sequential programming. An integrated development environment to code LDS, capable of keyword highlighting and syntax checking, is built and some screen shots are shared. A tool is coded to extract an LDS template from an expert drawn layout and sample templates and their instances are shown. A sequential convex programming based methodology is developed and used to minimize the layout area, which is shown to be a convex function of the layout width and height under realistic assumption. Thus, the area of an LDS template may be e ciently minimized which increases the exibility of an LDS template.
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    Multi-dimensional yield-aware optimization of the analog and heterogeneous circuits
    (Thesis (Ph.D.) - Bogazici University. Institute for Graduate Studies in Science and Engineering, 2020., 2020.) Pak, Murat.; Dündar, Günhan,
    Even though the design of digital circuits is well supported by several CAD tools, this is not the case for analog circuits and MEMS where the design is typically hand-crafted by expert designers. Several tools have been implemented for trade-off exploration in analog circuits; however, yield-optimization is a hot and vital topic considering that process variations have deteriorated along with the feature sizes scaling down; hence, physical variations originating from manufacturing process have a huge impact on yield. Therefore, efficient yield-aware optimization methodologies for analog ICs are needed. MEMS design, on the other hand, requires a lot of expert knowledge, which implies long design times and increased cost due to this physical heterogeneity. The approach followed by the industry, based on composing separately designed sensors and read-out circuitry, has several issues such as inappropriate partitioning of system specifications or potential violation of system level constraints during the coupling process of the these devices. Hence, design methodologies which can obtain globally optimal MEMS by performing co-optimization of the sensor and the circuit are needed. This study is mainly focused on developing and implementing novel and generic design methodologies for multi-objective yield-aware optimization of analog circuits and MEMS. A novel yield optimization technique has been proposed and compared with the existing approaches and has provided very promising results for yield-aware Pareto Front generation. Besides the work conducted for yield-aware optimization, co-optimization of MEMS and analog circuits has been performed for the first time by jointly optimizing a mechanical accelerometer sensor and an electronic read-out circuitry. The implemented yield-aware optimization techniques have been integrated into the co-optimization loop to enable yield-aware multi-objective optimization of MEMS.